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KT Micro has assembled a top-notch mixed-signal design team in the world. Most of the key members have more than 10 years of mixed-signal design experiences with world’s leading semiconductor companies. Many of them led core design teams in their previous companies before joining KT Micro. Their mixed-signal design experiences cover a frequency range from DC to 20GHz. Their technical strength has been demonstrated in the following areas:

·         System level experiences The team has extensive experiences working on highly integrated mixed-signal systems. They are experienced in system definition, partition, specification, behavioral modeling. They are experts in handling practical issues such as signal integrity, power distribution, frequency allocation, noise isolation, etc. that are critical to successful system designs and integrations. Some example design wins as results of their strong leadership and technical excellence are:

o        GSM RFCMOS mixed-signal processor

o        E3/T3 AFE

o        DVB mixed-signal processor

o        10GB Ethernet transceiver

·         High speed designs The team has lots of successful design experiences on various high speed high performance mixed-signal designs including very high speed ADCs, DACs, PLLs and Serdes, etc. Some of their latest designs are:

o        10-bit 200MSPS CMOS ADC

o        8-bit 400MSPS CMOS ADC

o        10-bit 240MSPS CMOS Video DAC

o        8-bit 800MSPS CMOS DAC

o        40 GB Transceiver

o        10 GB TIA/LIA combo

·         High resolution/accuracy designs KT Micro’s designers never overlook a single detail when it comes to high-resolution designs. They dig down to every fF or mW of parasitics as they may affect accuracy. Part of their successful designs include:

o        16-bit, 44KSPS audio SD ADC

o        15-bit 500KSPS dual-channel SD ADC

o        16-bit single-bit audio SD DAC

o        16-bit multi-bit, 8-OSR SD DAC

o        12-54MHz PLL with jitter < 66 ps peak-to-peak

o        9.5~12.5GHz PLL with jitter < 1ps RMS

·         High density designs It’s always very challenging when designing high-density large-scale mixed-signal ICs. KT Micro’s design team has unique design experience in handling such designs as large-scale pixel arrays which often require delicateness and innovations to solve issues like uniformity, parasitics, noise coupling, leakage, jitter accumulation and simulation time, etc. As an example, a cutting edge design that was led by one of our key members is:

o        OLED color micro-display chip with pixel array of 852x600x3

·         Low-power designs As a must in portable applications, low power designs are very desirable for today’s ICs fabricated in deep sub-micron technology, where the issue is further challenged by higher density, lower power supply and higher leakage. KT Micro’s designers had many successful bench-mark low power designs like:

o        16-bit voice band ADC consumes 30uA

o       852x600x3 OLED color micro-display chip consumes 200mW (pixel current between 250pA and 25nA)

KT Micro’s design team members have maintained outstanding records of first-time silicon success, which is crucial to achieve short time-to-market and competitive cost. Their excellent project management skill in complementary to their design skill ensures top quality, fast delivery of any complex designs for their customers.

 

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